The present invention relates to a printed circuit and a process for preparing it.
U.S. Pat. No. 4,572,764 discloses a multilayer printed circuit. This printed circuit comprises a first photosensitive insulator on a substrate. A first via hole is formed in the first insulator using a photoetching process. A second photosensive insulator is formed on the first insulator having a second via hole aligned with the first via hole. The second via hole is larger in diameter than the first via hole, forming a combined via hole having a stepped portion between the first and second insulators. A conductive circuit pattern is deposited on the side walls of the aligned via holes. A layer of copper powder is adhered to the side walls of the combined via hole and the laminate is baked in an oven and cured. However, there is a likelihood of leaving a photoresistive material in the stepped portion to produce a potential cause of troubles in electroplating with a possible disconnection in the electroplated conductor.